Please use this identifier to cite or link to this item:
192.168.6.56/handle/123456789/66697| Title: | Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms |
| Authors: | Kogel, Tim |
| Issue Date: | 2006 |
| Publisher: | Springer |
| URI: | http://10.6.20.12:80/handle/123456789/66697 |
| ISBN: | 1-4020-4825-4 |
| Appears in Collections: | Electrical and Computer Engineering |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.
